Digital Leader – VLSI Design

We are an exciting well-funded start-up who seek a highly experienced and visionary Digital Leader to strengthen and lead our Digital Design team. In this role, you will drive the development of cutting-edge data communication and DSP solutions, overseeing design, verification, and system integration for advanced ASIC projects. You will also be involved in research, architecture definition, and integration strategies, shaping the future of our innovative communication technologies.

Requirements:

Your Day-to-Day:

• Lead and manage a dynamic team of digital design engineers, driving the development of innovative ASIC architectures and DSP solutions.
• Define and prioritize project objectives, timelines, and deliverables to align with company strategy and business goals.
• Oversee the entire ASIC design process, from micro-architecture and RTL design to system integration and final silicon implementation.
• Work closely with Architecture teams to refine system specifications and optimize design choices.
• Deep dive into ITU/IEEE protocols, ensuring compliance and leveraging new standards for innovative design solutions.
• Learn, evaluate, and integrate new IPs into our designs, ensuring seamless functionality and performance.
• Collaborate with external IP vendors, managing IP selection, integration, and validation.
• Collaborate closely with cross-functional teams, including analog design, verification, backend, algorithm, DFT, and software engineers, ensuring seamless product integration and optimal performance.
• Mentor, guide, and inspire team members, fostering a culture of technical excellence, continuous learning, and innovation.
• Stay ahead of industry trends, bringing new methodologies, tools, and best practices to enhance the efficiency and quality of digital design and verification.
  
  

• 12+ years of experience in digital ASIC design, with a strong background in micro-architecture, RTL design, and verification.
• At least 3 years of proven leadership experience, managing teams and driving complex ASIC projects.
• Deep expertise in Verilog/SystemVerilog and ASIC design methodologies.
• Strong understanding of DSP architectures, data communication systems, and high-speed digital design.
• Experience with synthesis, timing closure, low-power design techniques, and design-for-test (DFT).
• Experience working with external IP vendors, including evaluation and integration of third-party IPs.
• Excellent interpersonal, communication, and team-building skills.
• B.Sc./M.Sc. in Electrical Engineering, Computer Engineering, or related field.
  
  

• Experience in high-speed interfaces (e.g., Ethernet 100G and above).
• Familiarity with advanced verification methodologies (UVM, formal verification, etc.).
• Proficiency in scripting languages such as Python, Perl, or TCL for automation.