We are seeking a skilled Hardware Engineer to contribute to the development of our next-generation cryptographic acceleration hardware.

The role involves designing, implementing, and optimizing hardware architectures tailored for advanced cryptographic workloads.

Responsibilities

• Design and implement digital hardware architectures for high-performance cryptographic computation.
• Develop RTL (Verilog/SystemVerilog) designs and optimize for performance, power, and area.
• Work on ASIC/FPGA development, from concept to verification and implementation.
• Collaborate with software and algorithm teams to ensure seamless hardware-software integration.
• Perform hardware acceleration benchmarking and optimization.

Requirements

• B.Sc. or higher in Electrical Engineering, Computer Engineering, or a related field.
• 3+ years of experience in digital hardware design (ASIC/FPGA).
• Strong proficiency in Verilog/SystemVerilog.
• Experience with synthesis, place-and-route, and timing analysis - an advantage.
• Familiarity with high-speed interfaces (DDR, HBM, PCIe).
• Experience in hardware acceleration for cryptographic applications – an advantage.
• Knowledge of GPU/CPU architectures and parallel computing – an advantage.
• Strong analytical and problem-solving skills, with a passion for innovation.