Design Verification Engineer

About the job

Join a leading provider of Cellular IoT chipsets and AI for image sensing, playing a pivotal role in realizing the vision of the Internet of Things (IoT).

Responsibilities

Take on a significant role in a small team developing the System-On-Chip of the company's cutting-edge 5G IoT and AI products.

In this role, you’ll investigate, invent, develop, innovate, and improve challenging verification environments, from block-level to chip-level. You’ll work with sophisticated verification methodologies implementing System-On-Chip flows, collaborate with the design team, and support SW and production teams. You’ll also research cutting-edge industry technology and standards in various fields such as communications, processors, and interconnect

Requirements

• BSc in electrical or computer engineering/computer science from an established university
• At least 4 years experience in the verification flow of complex designs from test plan definition to coverage closure
• Understanding of high-level system flows and constraints
• Experience in Specman and/or System Verilog
• Experience in UVM

Job No. 410037

CV to [email protected]