VLSI Design engineer

·    Required Experience:

·      3-7 years hands-on experience in logic design

·      IP Development from architecture definition, through RTL implementation all the way to tape-out.

·      Implement design through collaboration with cross-functional teams (Architecture, Verification, DFT , Emulation, and Backend) .

·      Knowledgeable in frontend design tools: Lint, CDC

Advantages:

1.     Knowledge in Ethernet and Networking.

2.     Experience with IP integration.

3.     Experience with multi-clock designs 

Required Skills:

·      Strong technical skills

·      Quick learner

·      Independent

·      Great communications skills

·      Extensive knowledge in Verilog/System Verilog

·      High debug abilities

Required Education:

• ·      BSEE/MSEE