Network Design Engineer, Google Cloud - Tel Aviv or Haifa

Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Tel Aviv, Israel; Haifa, Israel.Minimum qualifications:

• Bachelor's degree in BSC, or a related field, or equivalent practical experience.
• 10 years of experience architecting networking ASICs from specification to production.
• Experience working with design networking like: RDMA and or packet processing and system design principles for low latency, high throughput, security, and reliability.
• Experience developing RTL for ASIC subsystems.
• Experience in Cross-functional, micro-architecture, design, verification, logic synthesis, and timing closure.
  
  

Preferred qualifications:

• Experience working with software teams optimizing the hardware/software interface.
• Experience architecting networking switches, end points, and hardware offloads.
• Experience in Transmission Control Protocol (TCP), IP, Ethernet, PCIE and Dynamic random-access memory (DRAM), Network on Chip (NoC) principles and protocols.
• Experience in a procedural programming language (e.g. C++, Python, Go.).
• Experience in estimating performance by analysis, modeling, and network simulation. Skilled in defining and driving performance test plans.
• Understanding of packet classification, processing, queueing, scheduling, switching, routing, traffic conditioning, and telemetry.
  
  

About The Job

Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

In this role, you will be part of a team developing Application-Specific Integrated Circuit (ASIC) used to accelerate networking in data centers. You will have dynamic, multi-faceted responsibilities in areas such as project definition, design, and implementation. You will participate in the design, architecture, documentation, and implementation of the next generation of data center accelerators.

You will be responsible for performance analysis for an end to end networking stack using your deep knowledge of RDMA based transports.

Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.

Responsibilities

• Participate in evaluation of future ASIC designs and general architecture for executing Google’s data center networking roadmap: off-the-shelf components, vendor co-developments, custom designs, and chiplets.
• Collaborate in developing new layer protocols for data center networking.
• Understand how it interacts with software and other ASIC subsystems to implement groundbreaking data center networks.
• Define performance hardware/software interfaces. Write micro architecture and design specifications
• Define efficient micro-architecture and block partitioning/interfaces and flows
  
  

Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form .