Senior Verification Engineer

Samsung R&D center is looking for Digital Verification Engineer to join us.

Join the cutting-edge team at Samsung R&D Center as we embark on shaping the future of technology today. Beyond merely envisioning the horizon, we are actively pushing boundaries in various key areas of innovation. Samsung is committed to pioneering continuous advancements, delivering value to society, and fostering an environment where our employees can fully unleash their talents, creativity, and passion. Join us in building the tomorrow we envision,

The Group

Multimedia Design Team is taking an important role in designing Samsung’s automotive application processor and the next generation of Mobile Image Signal Processor (ISP).

About you

Committed to making things happen, you are an excellent communicator, listener and collaborator. You deliver what you say, when you say. You are curios, solutions oriented and a problem solver who constantly seeks opportunities to innovate and achieve the best possible outcome to the highest standard.

What will you do?

• Develop testbenches in UVM, write tests, sequences, agents, functional coverage, assertions and verification plans
• Craft automated verification flows
• Be able to influence and advance our SOC verification methodology.
• Have the opportunity to coach and mentor other members of the team and become a focal point in the group.
• Participate in verification reviews and recommend improvements

Requirements:

• BSC. in Electrical Engineering/ Computer Science
• Experience of 5 years with verification techniques and the full verification life cycle of at least 2 chips
• Experience in developing test benches and verification environments from scratch
• Excellent knowledge and hands on experience of UVM
• Experience with complex designs and advanced debug skills ability
• Excellent presentation and interpersonal skills with a demonstrated ability to communicate complex technical concepts
• Scripting skills in Python/ Perl/ TCL

Advantages

• Experience in wider verification technologies such as formal property based verification
• Experience with Palladium emulation platform
• Familiarity with Cadence EDA tools such as Xcelium and Verisium