Senior CPU-Memory Management Design Engineer

We are looking for a talented, fast learner, and highly motivated Senior CPU Logic Design Engineer with specific expertise in CPU’s Memory Management related logic (L1/2/3). As a member of our CPU MEM- Logic Design Team, you will be responsible for a portion of the design, of a high performance and low power chip, focusing on such tasks as micro-architectural definition, RTL coding, logic debug, supporting verification and BE implementation. This position offers you the opportunity to have real impact in a dynamic, technology-focused company impacting product lines roadmap. We have crafted a team of extraordinary people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing.

What You'll Be Doing

As a member of our CPU MEM team, you'll own and be responsible for crafting and timely delivery of a specific Memory-management related logic . Day to day tasks include:

• Understand and take a significant part of uArch definitions .
• Writing high quality, high performance and low power RTL .
• Collaborate with our verification team to verify the correctness of your unit and drive to high quality .
• Work with implementation to achieve your timing, area, performance, and power goals .
• Work on logic related to memory-management: coherency, prefetching, array control, memory translation and more.
  
  

• A Bachelor’s Degree in Electrical Engineering, Computer Engineering or Computer Science, or equivalent experience.
• 8+ years of experience in processor Memory Management design .
• Hardware description language expertise required
• Strong communication and interpersonal skills are required along with the work in a dynamic, global team.
• A strong background in computer architecture is highly desirable.
• Note: the job is not relevant for Memory physical-Arrays designers.