Senior ATPG IC Test Engineer

We are looking for a creative and independent Senior Test Engineer. NVIDIA Networking unit has continuously reinvented itself over two decades. Our high-speed buses & network products are leading in the markets with innovative ways to improve speed and bandwidth from one generation to another. Today, NVIDIA is increasingly known as the place for getting “End-to-End High-Speed Ethernet and InfiniBand Solutions” We're looking to grow our company and build our teams with people who can join us at the forefront of technological advancement. We need a creative individual who will help transfer Network Silicon ICs products (Switch, NIC, SmartNic) from design engineering to mass production.

You will be exposed to various aspects of design, DFT and test of NVIDIA network IC products, and will be responsible for definition and development of ATPG test from wafer level to final test of Network-ICs. In addition, your responsibilities will include working with manufacturing teams, DFT, characterization to improve scan test coverage and production optimization. If you are passionate about enabling of the highest quality Network products that will change the world, we want to hear from you!

What You'll Be Doing

• ATPG Test definition & development and implementation.
• Collaborate with different teams (BE, DFT, Engineering, Quality, Reliability, production engineering and characterization)
• Take ATPG ownership with different DFT method (from pre silicon validation to MP coverage) include planning, pattern generation, verification and post Silicon bring up and diagnosis.
  
  

• B.Sc. degree in Electrical/Computer engineering, Computer Science or equivalent experience
• 5+ years of experience with IC test development
• Experience with UltraFlex or/and other IC testers
• Good communication skills with diverse teams and functional groups
• Multi-tasking capabilities
• Strong self-learning skills
• High execution quality standards
  
  

• Hands on ATPG knowledge & technical experience in DFT ASIC Design and in ATPG tools
• Experience with ATE and Silicon bring-up