Applications Engineering, Sr Staff Engineer

The ideal candidate for this position is a seasoned engineer with requirements as following:

• Working with customers to develop solutions for their ASIC/SoC designs using the Synopsys IP portfolio.
• Perfect for someone who has ASIC/SoC design and/or architecture experience.
• Great interpersonal skills and is committed to the success of our customers.
• Working across various market segments, designs, foundries (TSMC, Samsung, Global Foundries ….) and processes ranging from 2nm to 40nm.
  
  

• RTL design and verification using Verilog or System Verilog
• Synthesis and static timing analysis, physical design flow, test bench creation and simulation.
• Some familiarity with analog/mixed-signal design and verification flows.
• Basic understanding of package and PCB design flows and technologies.

• Ability to understand and present complex technical requirements, problems, and solutions concisely in verbal and written communications.
• Ability to analyze, summarize and generate status updates from technical data.
• Ability to organize, conduct and co-ordinate meetings involving multiple teams internal and external.
• Prior experience or technical familiarity with interface and connectivity protocols, e.g., PCIe, DDR, USB, MIPI, HDMI, SATA, Die-to Die, Ethernet, and AMBA.
• Prior experience in selecting, using, designing, or supporting internal or external IP.
• Prior experience in an application engineering or another direct customer facing role.