Silicon/SoC Design and Micro-Architect lead

Wiliot was founded by the team that invented one of the technologies at the heart of 5G. Their next vision was to develop an IoT sticker, a computing element that can power itself by harvesting radio frequency energy, bringing connectivity and intelligence to everyday products and packaging, things previously disconnected from the IoT. This revolutionary mixture of cloud and semiconductor technology is being used by some of the world’s largest consumer, retail, food, and pharmaceutical companies to change the way we make, distribute, sell, use, and recycle products.

Our investors include Softbank, Amazon, Alibaba, Verizon, NTT DoCoMo, Qualcomm, and PepsiCo.

We seek a highly skilled Silicon Design and Micro-Architecture Engineer with technical managing abilities to join our Mix Signals Silicon development group. In this pivotal role, you will lead the design, micro-architecture, and Integration activity for our next-generation mixed signal cutting-edge SoC-based device. Your expertise in design, microarchitecture, and technical leadership capabilities will be instrumental in driving the innovation of our next-generation product.

Responsibilities:

• Design manager: Lead the digital design team's activity and integration with the Analog design and FW code. Design and implement power-saving techniques to minimize energy consumption.
• Micro-Architecture responsibilities: Help Define and execute the microarchitecture activity, low-power SoCs, considering factors of power, performance, Area (PPA). Including Documentation and reviews.
• Technical Leadership: Provide technical guidance and mentorship to a team of talented engineers, ensuring efficient collaboration with the analog, system, verification, and physical teams. and help deliver high-quality designs.
• Power and Area Optimization: Analyze and optimize the PPA of the SoC, Design and implement power-saving techniques using UPF flow and Power estimation tools.
• SoC activity: Collaborate with cross-functional teams to plan, execute, and track project timelines.
  
  

• BCs in Electrical Engineering.
• Minimum 7 years of experience in Silicon/SoC design, with a microarchitecture development knowledge
• Experience of leading design teams and SoC integration and execution.
• Deep understanding of SoC microarchitecture and integration and UPF flows.
• Experience with PPA analysis tools and techniques, such as simulation, profiling, and benchmarking.
• Strong problem-solving and analytical skills, with the ability to identify and resolve complex technical challenges.
• Excellent communication and interpersonal skills, with the ability to effectively collaborate with cross-functional teams.
• Extensive Knowledge of Verilog RTL, SV-UVM, UPF, CPU (RISC-V), and FW code.
• Advantages: knowledge of MCU SoC Arch. , Analog ICs, and Lab equipment.