Verification Manager

Work on exciting and advanced SoCs for image processing and computer vision applications.

Hands-on verification of SoC units, using advanced test benches and tools

Lead a team of verification engineers

Overall responsibility for the company’s VLSI verification activities.

Responsibilities

Verification environments creation, using System Verilog and UVM.

Units and chip level test plan creation

Implementation of test plans, test writing and debug

Functional and code coverage of the design and test plan

Simulation hardware accelerators (Synopsys Zebu) responsibility

Leading a team of verification engineers

Qualifications

· B.Sc. or higher in Electrical Engineering or computer engineering.

· At least 5 years of experience in Verification and/or IC design.

· Outstanding technical expertise in the successful completion of multiple VLSI implementation and verification projects.

· Programming languages: C, Verilog, System Verilog, scripting, are a must.

· Experience with, and thorough understanding of up-to-date RTL design, simulation and verification methodology, tools and languages.

· Strong communication and interpersonal skills to work closely with a variety of individual contributors and managers from different functional groups.

· Experience as a team leader is a must