Logic Digital Verification Engineer JB-2946

We are a global start-up that develops an innovative B2B product in the IoT field, and we're searching for a talented and experienced Software/Electrical Engineer to take part in the verification efforts for the company’s core product.

In this role, you will be leading all aspects of verification and will have a critical impact on the company's R&D path.

This position involves building and maintaining a complex verification environment, defining and executing a test plan.

It involves day to day work with other groups within the company such as System, Software, Analog, DFT and LAB activity according to needs.

At least 5 years of System Verilog UVM DV experience.

Bachelor’s or Master’s degree in electrical engineering or computer science.

Exeprience in Python/Shell scripting.

Knowledge of assertions (SVA) or others.

Knowledge of digital ASICs design flows.

Knowledge of industry-standard tools, including Verilog, Verilog simulator, and debug..

Functional Verification - System Verilog, Universal Verification Methodology (UVM), Verilog, Application-Specific Integrated Circuits (ASIC), Unix.

Version control (GIT)

Experience with SoC development work methodologies and tools.