VLSI Physical Design (Backend Eng) 

VLSI Physical Design (Backend Eng) -A leading global engineering company

Technical Profile:

B.Sc./M.Sc. in Electrical Engineering

>4 years of experience with RTL2GDS flow (ICC2/Innovus) with STA closure

>3 years of experience in Full Physical verification flow (DRC/LVS/DFM) with

ICV/CALIBRE

>2 years of experience in Developing Backend flow and methodologies with

Cadence or Synopsys tools.

Checking and performing IR-drop, ESD & Electro migration analysis

Script writing skills with TCL/python/sed/awk

Basic knowledge in Structural Design (Synthesis, Timing closure, Formal Equivalence

Check) – an advantage

Low Power Design including Power intent (UPF) definition & verification – an

advantage.

Experience in RTL blocks design (Verilog/VHDL) – an advantage