Senior Chip Design Engineer

Hyperspace is a hybrid search database designed to solve the limitations of today’s software based search solutions.

Implemented directly at the hardware level, Hyperspace reduces processing time by completely removing the software stack overhead.

The outcome, search performance that is delivering on speed, accuracy, and cost efficiency at any scale, at any time without compromise so you can have peace of mind in every query.

Our vision and work is being adopted by some of the world’s leading brands. And therefore, we need major talent to join our team.

Here are some of the job basics:

Key responsibilities

• Design micro-architecture for accelerated search workload
• FPGA implementation in RTL
• Simulation and debugging
• Design verification and integration

Skills and qualification

• B.Sc./M.Sc. in Electrical/Computer Engineering
• 5 years of experience in logic design
• Logic design experience at RTL level (Verilog/SV preferred), synthesis, place and route, timing analysis and timing closure
• Strong capabilities in system and hardware-level design
• Experience in writing advanced simulations environments using SV and Python
• Ability to tackle complex and hard-to-solve problems at hardware level
• Excellent collaboration and communications skills

Advantages

• Experience with Xilinx design flow and tools (Vivado ,SDK)
• Experience in developing designs in HLS
• Experience in cloud based FPGA instances
• Experience in Verification methodology (UVM or equivalent)