Senior Memory Silicon Validation Engineer

At NextSilicon, we are reimagining high-performance computing. Our pioneering coprocessor vastly accelerates supercomputers, driving them forward into a new generation. Our new software-defined hardware architecture enables HPC to fulfill its promise of breakthroughs in all advanced research fields. NextSilicon is looking for a talented and experienced HBM engineer to take part in silicon and system validation for the company’s core product. This position involves building a complex validation environment from scratch, defining test plan execution, and debugging failures. In this role, you will be leading validation from A to Z and will have a critical impact on the company’s success.

Requirements:

• B.Sc. or M.Sc. in Electrical Engineering or Computer Engineering, or equivalent experience
• Experience in implementing memory controller initialization code
• Experience in validating DRAM and HBM devices, memory subsystems, and DDR PHYs, including training and calibration software
• Experience in HW-SW integration and debugging
• Strong knowledge of C and C++: advantage
  
  

• Develop, port, and debug HBM controller initialization code
• Develop and execute test plans for pre-silicon and post-silicon validation, including targeted tests for validating specific HBM functionality
• Issue and implement engineering change orders
• Act as the focal point for HW and SW integration and HBM debugging
• Effective collaboration with cross-functional teams (SW, Architecture, Design, and ATE) as part of product development