Chief Architect

We are seeking a visionary and accomplished Chief SoC Architect to lead the technical vision and execution of our next-generation System-on-Chip (SoC) designs. You will be responsible for defining the architecture roadmap, and ensuring our SoCs deliver maximum performance, power efficiency, and cost-effectiveness.

Responsibilities:

• Develop and define the strategic architecture roadmap for future SoC generations, aligned with company goals and market trends.
• Lead the SoC architecture design process, encompassing processor cores, memory subsystems, I/O interfaces, and other critical components.
• Lead the integration of complex algorithms onto the SoC architecture, ensuring seamless hardware-software co-design and maximizing algorithm performance.
• Support the technology selection and evaluation, including 3rd party IP selection, staying at the forefront of SoC advancements and identifying optimal solutions.
• Collaborate with cross-functional teams, including VLSI teams, software team, system engineers, Algorithm team and analog team, to ensure seamless integration and functionality.
• Ensure adherence to quality standards and best practices throughout the SoC development lifecycle.
• Champion innovation and creativity, fostering a culture of technical excellence within the team.
• Reporting to VP R&D
  
  

• Master’s degree in electrical engineering, or a related field
• 10+ years of experience in SoC architecture design and development, with a proven track record of successful product launches.
• Deep understanding of SoC architectures, including high speed Datapath, High speed Serdes, PCS, processors, memory subsystems, AFE, I/O interfaces, and system integration.
• Strong understanding of high-speed signaling and high-performance computing principles, demonstrated through successful design and implementation of high-speed topologies.
• Strong leadership and communication skills, with the ability to motivate and inspire a diverse team.
• Excellent analytical and problem-solving skills, with a focus on delivering optimized solutions.
• Experience in cross-functional collaboration and managing stakeholders across various departments.
• Passion for innovation and keeping up with the latest advancements in SoC technology.
  
  

• Understanding Ethernet communication layers, including PCS (Physical Coding Sublayer), PMD (Physical Medium Dependent), and MAC (Media Access Control) sublayers.
• Experience with implementing error correction algorithms in hardware, particularly for high-speed communication systems
• Experience in developing behavioral and functional models of hardware components and systems.