System Validation Engineer

Astera Labs is a global leader delivering semiconductor-based connectivity solutions purpose-built to unleash the full potential of intelligent data infrastructure at cloud-scale. Our class-defining first-to-market products based on PCIe, CXL, and Ethernet technologies deliver critical connectivity for high-value artificial intelligence and machine learning applications. Our focus on customer-driven product definition and commitment to design solutions in the cloud, for the cloud, results in breakthrough execution and scale for our customers. We are headquartered in the heart of California’s Silicon Valley, with R&D centers and offices in Taiwan, China, Vancouver and Toronto, Canada, and Haifa, Israel.

Job Description

The mission of this role is to perform system validation for Astera Lab’s highly advanced devices, that includes defining strategy, develop tools, innovate, be creative to make sure devices are performing as they should in all aspects, logical, performance, durability, stress and more. Escort our customers when bringing up their systems equipped with our devices, help them maximize performance, understand issues and drive them into full production.

You will be part of the new site located at Israel (Haifa – Matam), surrounded with highly experienced and professional engineers who will escort, mentor and support you on your new journey at Astera Labs Israel.

Basic Qualifications

• Strong academic and technical background in electrical or computer engineering
• ≥5 years’ experience supporting or developing complex SoC/silicon products for Server, Storage, and/or Networking applications.
• Basic understanding of x86/ARM architecture, UEFI/Linux boot sequence
• Professional attitude with the ability to prioritize a dynamic list of multiple tasks, to plan and prepare for customer/internal meetings in advance, and to work with minimal guidance and supervision.
• Entrepreneurial, open-mind behavior and can-do attitude. Think and act with the customer in mind!
  
  

• Hands-on, thorough knowledge of high-speed protocols like CXL, PCIe, NVMe, Ethernet.
• Silicon/System bring-up, validation, and debug experience, including customer’s systems.
• Familiarity with DDR memory standards with experience in system testing, characterization, margin analysis and optimization
• Experience with lab equipment including protocol analyzers, in-circuit debuggers, and CPU-based tool suites.
• Familiarity with lab testing automation techniques
  
  

• Ability to interface with memory devices at the ioctl/memio/memap level; familiarity with device trees and related debug techniques.
• C\C++ for embedded FW and device drivers
• Familiarity with CXL compliance standards and ability to follow and be involved in compliance consortiums to adapt the tests to be run from X86/ARM based platforms.
• Experience working with DRAM memory vendors on DDR4 or DDR5 to identify issues and working on SoC HW/FW to improve memory calibration and tuning sequences.
• Knowledge of memory subsystem compliance from a data integrity and RAS is a plus.
• Knowledge of schematic capture and PCB layout tools from Cadence, Altium, etc.
• Knowledge of simulation tools such as Keysight ADS, Mathworks QCD, etc. for IBIS-AMI analysis