MIPI Applications Engineer, Sr II - 46574BR

At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.

Our Silicon IP business is all about integrating more capabilities into an SoC—faster. We offer the world’s broadest portfolio of silicon IP—predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabilities. Meet unique performance, power, and size requirements of their target applications. And get differentiated products to market quickly with reduced risk.

Applications Engineer

We are looking for an Applications Engineer (AE) to join our team. This is an exciting opportunity to be part of a fast-paced Applications Engineering team that is responsible for supporting our customers in the Synopsys Intellectual Property (IP) domain.

In this position the AE will be working with high-end customers in the growing area of Mobile Industry Processor Interface (MIPI ® ) by supporting them to integrate Synopsys MIPI Intellectual Property (IP) namely Camera and Display solutions into customers SoCs.

Responsibilities

• Provide technical support to field engineers and customers who are using or considering Synopsys’ MIPI Intellectual Property (IP)
• Partner with high-tech customers through the full-cycle of ASIC design from installation, training, and RTL design to production testing
• Conduct reviews on customers major SoC design milestones
• Author application-notes and/or white-papers that promote the IPs’ ease of use, or address specific challenges in the IPs’ usage
• Provide feedback to Internal Teams for continuous IPs product improvements based on customers feedback and usage
  
  

• Bachelors with 5+ years or Masters with 2+ years of relevant experience on ASIC design process area
• Working knowledge in Verilog HDL, Synthesis, Simulation, Verification.
• Additional knowledge in Place and Route, Design Reuse and/or Physical Design or Analog Design is a plus.
• MIPI, High-speed SERDES or Parallel interfaces knowledge is a plus.
• Good verbal and written communication skills in English and ability to interact with customers