Physical Verification STA Signoff

Key Responsibilities:

• The ideal candidate should have deep domain knowledge in STA, Power signoff and participated in multiple chip tapeouts preferably at advanced nodes
• Design experience should include timing and power closure, ECO flow, and physical design expertise.

Qualifications:

·      B.S. or higher degree in Electrical Engineering, Computer Science, or a related field.

·      Deep Synopsys STA, ECO, and physical design closure experience

·      3+ years of experience in STA.

·      Knowledge of timing corners/modes, process variations and signal integrity related issues

·      Good understanding of the RTL2GDS flows and methodologies.

·      Exceptional tcl knowledge, interpersonal and communication skills with a passion for world-class customer service

·      Good communication skills and ability to work in a team-oriented environment.

·      Good English level.