Silicon and Package Technology Engineer

Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Tel Aviv, Israel; Haifa, Israel.Minimum qualifications:

• Bachelor's degree in Electrical Engineering, or equivalent practical experience.
• Experience in IC package design for high speed/power ICs such as CPUs, GPUs/ASIC/Chipset.
• Experience in SI/PI design for all level interconnections including chip, package, and PCB level.
• Experience in full system power analysis including silicon and package interconnect.
  
  

Preferred qualifications:

• Master's degree in Electrical Engineering.
• Experience in a lab with electrical characterization in one or more of the following interfaces: PLL, SERDES, or DDR4\5.
  
  

About The Job

Our computational challenges are so big, complex and unique we can't just purchase off-the-shelf hardware, we've got to make it ourselves. Your team designs and builds the hardware, software and networking technologies that power all of Google's services. As a Hardware Engineer, you design and build the systems that are the heart of the world's largest and most powerful computing infrastructure. You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data centers affecting millions of Google users.

Google's mission is to organize the world's information and make it universally accessible and useful. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.

As a Silicon and Package Technology Engineer, you will be responsible for the design and characterization of signal and power integrity of our Integrated Circuit (IC) designs. You will design the external electrical interfaces of the device, from their Signal/Power-integrity and electrical usage perspectives. You'll set up methodologies, perform simulations, silicon characterization and correlations to ensure our IC designs meet systems design budgets and achieve the highest performance. You will work with systems architects, ASIC design, systems engineers, and partner cross-functionally with teams and external vendors/partners.

Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.

Responsibilities

• Own the electrical aspect of integrating advanced Physical IPs (e.g., PLLs, SERDES, DDR and GPIOs).
• Run Advanced Electrical Analysis using HSPICE\other circuit simulators.
• Own chip/package electrical analysis, timing analysis, PDN design and creation of package design templates, guidelines and sign-off criteria.
• Drive package trial layouts for physical\electrical aspects investigations.
• Run deep and thorough electrical analysis in the lab using advanced measurement equipment.
  
  

Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form .