Senior Verification Engineer

A global Hi-Tech company is looking for a Senior Verification Engineer!

The Verification Cmos-Image-Sensor-Team is required to tackle the full flow of verification, from block & IP level to system level, including interfaces & deep understanding of all design flow and technical teams (such as Digital & FW).

We are looking for people with a broad set of technical skills, who are ready to tackle some of technology’s greatest challenges, who have the ability to think out of the box and bring the disruptive technologies that will define our future.

What will you do?

• Develop verification environments from block level to system level.
• Develop verification components including agents, scoreboards, coverage etc.

Requirements

• B.Sc./M.Sc.in Electrical Engineering/ Computer Science
• Minimum 5 years of experience in SV UVM.
• Experience with verification techniques and the full verification life cycle of at least 3 chips.
• Experience in developing test benches and verification environments from scratch.
• Experience with complex designs and advanced debug skills ability.
• Strong communication skills.
• Ability to work well in a team.