Senior VLSI Design Enginee

As a Senior VLSI Designer, you will be responsible for the end-to-end design and implementation of advanced digital IPs, including DSP cores and hardware accelerators. You will work across the full design flow- from architecture definition and micro-architecture design, through RTL development and verification, to synthesis, timing closure, and static timing analysis (STA). Your work will directly contribute to the silicon success of next-generation products across various domains
דרישות התפקיד
• B.Sc. / M.Sc. in Electrical Engineering
• 5-10 years of experience in VLSI design.
• Proficiency in RTL design (Verilog/System Verilog), synthesis, and timing analysis.
• Familiarity with EDA tools (Synopsys, Cadence, Mentor).
• Strong understanding of digital design principles, SoC architecture, and low-power techniques.
• Excellent problem-solving and communication skills.
Advantages:
• Knowledge of signal processing and digital communication systems.
• Experience in scripting using TCL and Python