Senior Signal Integrity Engineer

We are looking for an experienced Senior Signal Integrity Engineer to join our Hardware Engineering team. This role focuses on ensuring optimal signal integrity for high-speed interfaces, including Ethernet, PCIe, DDR5, and other next-generation technologies. As part of the team, you will be responsible for performing signal integrity analysis, developing signal integrity models, and ensuring electrical compliance for high-speed SERDES I/Os.
Responsibilities:
Conduct signal integrity analysis and simulations for high-speed interfaces such as 112Gbps Ethernet, PCIe Gen5, and DDR5 interfaces.
Develop and implement signal integrity guidelines for PCB design, ensuring high-performance and low-loss signal paths.
Analyze and resolve signal integrity issues related to high-speed interfaces, including reflection, crosstalk, and power delivery network (PDN) issues.
Collaborate with PCB layout engineers to optimize design for signal integrity, ensuring compliance with electrical standards a

דרישות:

Bachelor's or Masters degree in Electrical/Electronics Engineering with 10+ years of relevant experience.
Strong understanding of electromagnetic (EM) concepts and transmission line theory.
Extensive experience in signal integrity analysis for high-speed serial interfaces, including Ethernet, PCIe, and DDR5.
Proficiency in using EDA tools like Ansys SIWAVE, HFSS, or similar.
Hands-on expertise in time-domain and frequency-domain analysis, jitter, loss, and eye-diagram analysis.
Strong background in HSPICE simulations and model development.
Experience with PCB layout techniques for high-speed designs.
Excellent communication skills and the ability to work effectively in a collaborative team environment.
Advantages:
Experience with advanced simulation tools and techniques.
Experience with high-speed interfaces such as 112Gbps PAM4 Ethernet, PCIe Gen5, and DDR5.
In-depth knowledge of high-speed PCB design and layout principles.
Familiarity with power integrity and power noise simulations