ASIC Design Engineering Technical Leader

we are looking for a ASIC Design Engineering Technical Leader.Your Impact:Write and review micro-architecture specificationsImplement RTL (Verilog/SystemVerilog) to meet timing, performance, and power requirementsContribute to full chip integration, timing methodology, and analysisCollaborate with verification engineers to resolve bugs and achieve coverage closureWork with the physical design team to close timing and PnR issuesSupport design methodology evolution and best practicesPerform debug, root-cause analysis, and post-silicon validation in the labדרישות:B.Sc./M.Sc. in Electrical Engineering from a top universityMinimum of 8 years of proven experience in a relevant fieldRTL design experienceFamiliarity with UVM and functional verification methodologiesPreferred Qualifications:Experience with MATLAB simulations and bit-exact modeling environmentsFamiliarity with mixed-signal systems and environmentsKnowledge and hands-on experience with Clock Domain Crossing (CDC) המשרה מיועדת לנשים ולגברים כאחד.