PHY Post Silicon Validation Engineer

Youll be joining the post silicon validation team in PHY system group as part of the silicon development .
Our team deals with PHY and system aspects of the SerDes communication IP: PHY FW, calibrations, system definitions and operations and post-silicon validation including developing the automation infrastructure and tools.
We use latest silicon technologies and processes to build the largest scale and most complex devices at the edge of feasibility.

דרישות:

B.Sc or M.Sc in Electrical Engineering, Computer Science, or equivalent
Experience in PHY/SerDes validation (high‑speed SerDes characterization, link stability, PVT corners) and/or other PHY layer of communication systems
Proven ability in system‑level debugging to isolate faults across HW/SW/Silicon
Strong scripting/programming skills in Python or C++
Practical experience with lab instrumentation: oscilloscopes, BERTs, spectrum analyzers
Preferred Qualifications
Knowledge of signal processing / communication theory (DSP, modulation, link‑layer communication)
Linux proficiency, Git, and experience with Jenkins/DevOps automation frameworks
GUI development experience and database familiarity
Understanding of PCIe and Ethernet standards
System orientation with a multi‑disciplinary approach and strong multitasking capability המשרה מיועדת לנשים ולגברים כאחד.