Verification Engineer

We're looking for exceptional engineers to join our Pre-Silicon Verification team - the team that sits at the very center of the chip development lifecycle. Verification at Annapurna Labs isn't a downstream checkpoint - it's the connective tissue that spans the entire product journey:
It starts at product definition - we engage from day one, shaping requirements and translating product intent into verification strategies before a single line of RTL is written.
It extends into software - we work side-by-side with SW teams, verifying hardware-software interfaces and ensuring seamless integration across the stack.
It reaches into physical design - we verify physical design aspects within functional verification, bridging the gap between logical correctness and silicon reality.
It closes the loop - from spec to silicon, our verification touches every team and every stage of chip development.

דרישות:

Basic Qualifications
- Electrical/Computer Science engineer.
- 5+ years of experience with RTL verification.
- Knowledge of Hardware Verification concepts and tools (UVM , Coverage Driven verification).
- Sound understanding and knowledge of object-oriented programming concepts, Verilog/SystemVerilog/Specman.

Preferred Qualifications
- Knowledge of the following programming languages: Perl/Bash/TCl/Python.
- Knowledge of PCIe, Processors, Ethernet, DDR. המשרה מיועדת לנשים ולגברים כאחד.