Physical Layer Architecture Engineer

With the growing demand for traffic bandwidth in datacenters, efficient physical high-speed communication becomes a crucial part of the development of silicon ASCs that serve networking infrastructures. We are looking for a PHY (Physical Layer) Architect for our Architecture team. We are positioning you to a key role to face this challenge and become part of our team, so we can continue developing the best devices in the industry.

What you will be doing:
Lead projects across team, starting from processing requirements and definitions from customers and translating those into detailed technical specification for hardware architecture, system embedded software, user interface and high-level design.
Supervise the implementation of projects by team-leaders / developers / QA, participate in low level design reviews, QA test plans reviews, and keep track of changes and handle obstacles.
Define the architecture of implementing physical layer standards into our ASIC devices.
Involved in stan

דרישות:

BS or MS degree in EE.
3+ years of experience in the following fields: Physical layer communication / System / Signal Integrity / high speed communication protocols.
Excellent problem solving, teamwork, and interpersonal skills,
Background in embedded software.
Experience in networking.
Experience in Wire Line Physical layer protocols like IEEE 802.3, InfiniBand, PCIe, USB, etc.
Communication skills, analytical abilities, technically hands-on. המשרה מיועדת לנשים ולגברים כאחד.