Photonics Layout Engineer

We are looking for a Photonics Layout Engineer to join our integrated photonics design team.

This position is also well-suited for Analog Layout Engineers who are interested in transitioning into photonic integrated circuit (PIC) design.

In this role, you will be responsible for creating, optimizing and validating PIC layouts, ensuring manufacturability, performance and compliance with foundry design rules.

You will work closely with device designers, process engineers and tape-out teams to deliver high-quality layouts of silicon photonics PICs.

Strong candidates will have hands-on experience with industry-standard layout tools, especially Cadence Virtuoso or similar software.

Understanding of photonic components, waveguide routing and automated layout generation is a major advantage.

You will also contribute to layout methodologies, PCells, and design automation flows to accelerate PIC development.

Responsibilities

Develop and implement mask layouts for photonic integrated ci

דרישות:

Requirements:

Hands-on experience with Cadence Virtuoso or similar layout software (e.g., analog IC layout tools).

Experience with DRC/LVS, foundry PDKs, and layout verification methodologies.

Familiarity with foundries PDKs.

Ability to build and maintain automated layout structures (PCells/SKILL scripting or equivalent).

Strong communication skills and ability to work in cross-functional teams.

Preferred:

Background in silicon photonics fabrication processes.

Experience with mixed photonic-electronic layout integration. המשרה מיועדת לנשים ולגברים כאחד.