Full Chip Layout Physical Design Engineer

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
The AI and Infrastructure team is redefining whats possible. We empower our company customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include our companyrs, our company Cloud customers, and billions of our company users worldwide.
We're the driving force behind our company's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to

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Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
4 years of experience with physical design flows and methodologies (RTL2GDS).
Experience with semiconductor process technologies (deep submicron, advanced nodes like 5nm and below), and device physics (MOSFET/FINFET).
Experience with Design For Testability (DFT) and low-power design methodologies.
Experience with UPF (Unified Power Format) and its application in physical design.
Preferred qualifications:
Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture, or a related field.
Experience with scripting languages such as Perl, Python, or Tcl.
Excellent analysis skills, with the ability to understand, debug, and resolve issues in the design flow. המשרה מיועדת לנשים ולגברים כאחד.