Physical Design Engineer (Backend)

Job Description:For a hi-tech company developing satellite communication technologies, with offices in the Shefela / Haifa Matam areaAdditional Positions:ASIC designer/VLSILocation:Haifa area, Shfela areaCategory:HardwareJob Qualifications:COT/ASIC physical design flow covering: Synthesis, Floorplanning, Place and Route (P&R), Clock Tree Synthesis (CTS), Parasitic Extraction, Static Timing Analysis (STA) and Timing Closure, Physical Verification, Power Analysis, Formal Verification, DFT/DFM and ATPG insertion/pattern generationDeep sub-micron (28nm or below) process technologiesIndustry standard design processes for deep sub-micron designsProblem-solving and analytical skillsPractical use of scripting languages Tcl/Python/Perl etcExperience of at least one of the following EDA tool flows: Cadence or SynopsysCommunicating with other design teams, 3rd party IP and library suppliers and EDA tool vendors to improve scripts and tool flowManaging/Interfacing to sub-contract design service providersEducation:At least Bachelor of Science in Electrical Engineering, Computer Science, or related field from a major academic institute.Company Occupation:High TechCompany Size:Medium (50 - 150)